The AI chip arms race is reshaping the pace of expansion for the world's most advanced wafer capacity.
According to Taiwanese media reports on September 28, tech giants including Apple, Nvidia, AMD, Qualcomm, and MediaTek have collectively increased their bookings for Taiwan Semiconductor Manufacturing (NYSE: TSM) 2nm family capacity by 10% to 20%. Driven by this, TSMC has significantly accelerated its 2nm expansion plan, with a year-end monthly capacity target of 120,000 wafers, far exceeding the previously estimated 90,000 to 100,000 wafers and equivalent to achieving its original 2027 capacity target two years ahead of schedule. This expansion speed has been confirmed by TSMC officially as the fastest in its history.
TSMC Senior Vice President and Deputy Co-COO Y.J. Mii disclosed at this year's TSMC North America Technology Symposium that in response to strong demand from AI and other sectors, five 2nm fabs will ramp up simultaneously for the first time this year, covering two in Hsinchu and three in Kaohsiung. He also noted that first-year wafer output for 2nm will increase by 45% compared to first-year 3nm output in 2023, and the compound annual growth rate for 2nm capacity from 2026 to 2028 will reach 70%.
Meanwhile, TSMC's 3nm capacity expansion is also progressing in parallel. Monthly capacity for 3nm at the Southern Taiwan Science Park will approach 180,000 wafers in the fourth quarter of this year, with three additional 3nm fabs being added in Taiwan, Arizona in the United States, and Japan, comprehensively laying out the global advanced process supply chain.
Customers Rush to Place Additional Orders, 2nm Expansion Progress Far Ahead
The market had originally estimated that TSMC's 2nm family monthly capacity would be approximately 90,000 to 100,000 wafers by the end of this year, reaching the 110,000 to 140,000 wafer range by 2027 under continued double-digit growth. However, according to reports, industry sources revealed that due to strong demand from Apple and non-Apple customer groups, TSMC's 2nm family new capacity ramp-up speed and scale have set historical records, far exceeding the 3nm family's first-year capacity ramp-up pace.
The roster of customers placing additional orders covers core players in the AI chip and high-performance computing (HPC) sectors — Apple, Nvidia, AMD, Qualcomm, and MediaTek — with additional booking increases ranging from 10% to 20%. According to reports, TSMC consistently does not comment on customer information or market rumors, but Y.J. Mii's public remarks at the North America Technology Symposium have confirmed this expansion acceleration at the official level.
According to reports, industry analysts pointed out that TSMC's massive expansion of 2nm family capacity is crucial for the aforementioned customers that require large-scale and stable advanced process wafer manufacturing support, helping to secure supply chain safety and support their respective AI product roadmaps.
Five Fabs Ramping Simultaneously, 2nm Ramp-Up Fastest in History
According to reports, Y.J. Mii's remarks at the North America Technology Symposium represent the most explicit official expansion signal to date. Five 2nm fabs ramping simultaneously this year is a first in TSMC's history, and the scale of this deployment itself reflects the urgency on the demand side.
In terms of quantitative indicators, first-year wafer output for 2nm increasing by 45% compared to first-year 3nm output in 2023 means TSMC has achieved a steeper capacity ramp-up curve at a more advanced process node. From 2026 to 2028, the compound annual growth rate for 2nm capacity is expected to reach 70%, a growth rate that represents extremely rare high-intensity expansion in the semiconductor industry.
In comparison, TSMC's 3nm capacity expansion pace is relatively steady — with a compound annual growth rate of approximately 25% expected from 2022 to 2027. The significant gap in growth rates between the two reflects the rapid forward migration of market demand toward more advanced process technologies.
3nm Global Layout Advances in Parallel, New US Fab to Begin Mass Production in 2027
While accelerating 2nm expansion, TSMC's 3nm capacity expansion has not slowed. Monthly capacity for 3nm at the Southern Taiwan Science Park will approach 180,000 wafers in the fourth quarter of this year, with optimistic expectations of approaching 200,000 to 210,000 wafers by 2027, representing approximately 16% annual growth.
At the global capacity layout level, TSMC is adding three new 3nm fabs, located in Taiwan, Arizona in the United States, and Japan, to support continued future demand for 3nm process technology. Additionally, TSMC continues to convert 5nm equipment in Taiwan to support 3nm capacity, further improving utilization efficiency at existing fab sites.
The second fab at the new US site will adopt 3nm process technology, has completed construction, and is scheduled to begin mass production in the second half of 2027. This will be the most advanced process node TSMC has established on US soil, holding significant strategic importance for meeting the supply chain needs of local US customers.
Analysts believe that TSMC's accelerated 2nm expansion this round has direct market implications at multiple levels.
For customers, the early release of capacity means that major clients such as Apple and Nvidia can obtain sufficient advanced process wafer supply earlier, helping to accelerate the mass production pace of AI chips and end products while reducing supply chain bottleneck risks.
For TSMC itself, the better-than-expected expansion of 2nm capacity will significantly enhance revenue contribution from advanced processes, and combined with the multi-point global layout of 3nm, overall operating momentum is expected to continue strengthening.
For the broader semiconductor industry, TSMC's rapid expansion at the most advanced process nodes further consolidates its dominant position in the global wafer foundry market, while also signaling that the AI infrastructure investment boom is accelerating its transmission from the chip design side to the manufacturing side.